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1 ? fn6321.3 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2007, 2008. all rights reserved. all other trademarks mentioned are the property of their respective owners. isl28146, isl28246 5mhz, single and du al rail-to-rail input-output (rrio) op amps the isl28146 and isl28246 are low-power single and dual operational amplifiers optimized for single supply operation from 2.4v to 5.5v, allowing op eration from one lithium cell or two ni-cd batteries. they feature a gain-bandwidth product of 5mhz and are unity-gain stab le with a -3db bandwidth of 13mhz. these devices feature an in put range enhancement circuit (irec) which enables them to maintain cmrr performance for input voltages greater than the positive supply. the input signal is capable of swinging 0.25v abov e a 5.0v supply and to within 10mv from ground. the output operation is rail-to-rail. the parts draw minimal supply current while meeting excellent dc accuracy, ac performance, noise and output drive specifications. the isl28146 features an enable pin that can be used to turn the de vice off and reduce the supply current to only 16a. operatio n is guaranteed over -40c to +125c temperature range. features ? 5mhz gain bandwidth product @ a v = 100 ? 13mhz -3db unity gain bandwidth ? 1ma typical supply current (per amplifier) ? 650v maximum offset voltage ? 16na typical input bias current ? down to 2.4v single supply voltage range ? rail-to-rail input and output ? enable pin (isl28146 only) ? -40c to +125c operation ? pb-free (rohs compliant) applications ? low-end audio ? 4ma to 20ma current loops ? medical devices ? sensor amplifiers ? adc buffers ? dac output amplifiers ordering information part number (note) part marking package (pb-free) pkg. dwg. # isl28146fhz-t7* gabs 6 ld sot-23 mdp0038 isl28146fhz-t7a* gabs 6 ld sot-23 mdp0038 isl28246fbz 28246 fbz 8 ld soic mdp0027 isl28246fbz-t7* 28246 fbz 8 ld soic mdp0027 isl28246fuz 8246z 8 ld msop mdp0043 isl28246fuz-t7* 8246z 8 ld msop mdp0043 isl28146eval1z evaluation board - 6 ld sot-23 isl28246soiceval1z evaluation board - 8 ld soic ISL28246MSOPEVAL1Z evaluation board - 8 ld msop *please refer to tb347 for det ails on reel specifications note: these intersil pb-free plas tic packaged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. pinouts isl28146 (6 ld sot-23) top view isl28246 (8 ld msop) top view isl28246 (8 ld soic) top view 1 2 3 6 4 5 +- out v- in+ v+ en in- 1 2 3 4 8 7 6 5 out_a in-_a in+_a v+ out_ b in-_b v- in+_b + - + - 1 2 3 4 8 7 6 5 out_a in-_a in+_a v+ out_b in-_b v- in+_b + - + - data sheet june 23, 2008
2 fn6321.3 june 23, 2008 absolute maxi mum ratings (t a = +25c) thermal information supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75v supply turn on voltage slew rate . . . . . . . . . . . . . . . . . . . . . 1v/s differential input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ma differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . v- - 0.5v to v+ + 0.5v esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kv machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300v charged device model. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1500v thermal resistance (typical, note 1) ja (c/w) 6 ld sot-23 package . . . . . . . . . . . . . . . . . . . . . . . 230 8 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . 120 8 ld msop package . . . . . . . . . . . . . . . . . . . . . . . . 160 output short-circuit duration . . . . . . . . . . . . . . . . . . . . . . .indefinite ambient operating temperature range . . . . . . . . .-40c to +125c storage temperature range . . . . . . . . . . . . . . . . . .-65c to +150c operating junction temperature . . . . . . . . . . . . . . . . . . . . . +125c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 1. ja is measured with the component mounted on a high effective therma l conductivity test board in free air. see tech brief tb379 f or details. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v + = 5v, v - = 0v, v cm = 2.5v, r l = open, t a = +25c unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by characterization. parameter description conditions min (note 2) typ max (note 2) unit dc specifications v os input offset voltage -650 -750 30 650 750 v input offset voltage vs temperature 0.3 v/c i os input offset current -10 -15 010 15 na i b input bias current -35 -40 16 35 40 na cmir common-mode voltage range guaranteed by cmrr 0 5 v cmrr common-mode rejection ratio v cm = 0v to 5v 90 85 114 db psrr power supply rejection ratio v + = 2.4v to 5.5v 90 85 99 db a vol large signal voltage gain v o = 0.5v to 4v, r l = 100k to v cm 600 500 1770 v/mv v o = 0.5v to 4v, r l = 1k to v cm 140 v/mv v out maximum output voltage swing output low, r l = 100k to v cm 36 10 mv output low, r l = 1k to v cm 70 90 110 mv output high, r l = 100k to v cm 4.99 4.98 4.994 mv output high, r l = 1k to v cm 4.92 4.89 4.94 v i s,on supply current, enabled per amplifier 1 1.25 1.4 ma i s,off supply current, disabled 10 14 16 a v os t --------------- - isl28146, isl28246
3 fn6321.3 june 23, 2008 i o + short-circuit output source current r l = 10 to v cm 48 45 56 ma i o - short-circuit output sink current r l = 10 to v cm -54 -48 -45 ma v supply supply operating range v + to v - 2.4 5.5 v v enh en pin high level, isl28146 only 2 v v enl en pin low level, isl28146 only 0.8 v i enh en pin input high current, isl28146 only v en = v + 11.5 1.6 a i enl en pin input low current, isl28146 only v en = v - 16 25 30 na ac specifications gbw gain bandwidth product a v = 100, r f = 100k , r g = 1k 5mhz unity gain bandwidth -3db bandwidth a v =1, r f = 0 , r l = 10k , v out = 10mv p-p 13 mhz e n input noise voltage peak-to-peak f = 0.1hz to 10hz 0.4 v p-p input noise voltage density f o = 1khz 12 nv / hz i n input noise current density f o = 10khz 0.35 pa/ hz cmrr input common mode rejection ratio f o = to 120hz; v cm = 1v p-p , r l = 1k -90 db psrr- to 120hz power supply rejection ratio (v - )v + , v - = 1.2v and 2.5v, v source = 1v p-p , r l = 1k -88 db psrr+ to 120hz power supply rejection ratio (v + )v + , v - = 1.2v and 2.5v, v source = 1v p-p , r l = 1k -105 db transient response sr slew rate v out = 1.5v, r f = 50k , r g = 50k to v cm 1.9 v/s t r , t f , large signal rise time, 10% to 90%, v out a v = +2 , v out = 2v p-p , r g = r f = r l = 1k to v cm 0.6 s fall time, 90% to 10%, v out a v = +2 , v out = 2v p-p , r g = r f = r l = 1k to v cm 0.5 s t r , t f , small signal rise time, 10% to 90%, v out a v = +2 , v out = 10mv p-p , r g = r f = r l = 1k to v cm 65 ns fall time, 90% to 10%, v out a v = +2 , v out = 10mv p-p , r g = r f = r l = 1k to v cm 62 ns t en enable to output turn-on delay time, 10% en to 10% v out v en = 5v to 0v, a v = +2, r g = r f = r l = 1k to v cm 5s enable to output turn-off delay time, 10% en to 10% v out v en = 0v to 5v, a v = +2, r g = r f = r l = 1k to v cm 0.3 s note: 2. parameters with min and/or max limits are 100% tested at +25 c, unless otherwise specified. temperature limits established by characterization and are not production tested. electrical specifications v + = 5v, v - = 0v, v cm = 2.5v, r l = open, t a = +25c unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by characterization. (continued) parameter description conditions min (note 2) typ max (note 2) unit isl28146, isl28246
4 fn6321.3 june 23, 2008 typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open figure 1. gain vs frequency vs feedback resistor values r f /r g figure 2. gain vs frequency vs v out, r l = 1k figure 3. gain vs frequency vs v out , r l = 10k figure 4. gain vs frequency vs v out , r l = 100k figure 5. gain vs frequency vs r l figure 6. frequency resp onse vs closed loop gain -15 -10 -5 0 5 10 15 100 1k 10k 100k 1m 10m 100m frequency (hz) v + = 5v r l = 1k a v = +2 v out = 10mv p-p c l = 16.3pf normalized gain (db) r f = r g = 100k r f = r g = 1k r f = r g = 10k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) v + = 5v r l = 1k a v = +1 v out = 10mv p-p c l = 16.3pf normalized gain (db) v out = 100mv v out = 10mv v out = 50mv v out = 1v -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) v + = 5v r l = 10k a v = +1 v out = 10mv p-p c l = 16.3pf normalized gain (db) v out = 100mv v out = 10mv v out = 50mv v out = 1v -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) v + = 5v r l = 100k a v = +1 v out = 10mv p-p c l = 16.3pf normalized gain (db) v out = 100mv v out = 10mv v out = 50mv v out = 1v r l =10k r l =1k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) v + = 5v a v = +1 v out = 10mv p-p c l = 16.3pf normalized gain (db) r l =100k -10 0 10 20 30 40 50 60 70 gain (db) 100 1k 10k 100k 1m 10m 100m frequency (hz) v + = 5v v out = 10mv p-p c l = 16.3pf r l = 10k a v = 1, r g = inf, r f = 0 a v = 10, r g = 1k, r f = 9.09k a v = 101, r g = 1k, a v = 1001, r g = 1k, r f = 1m r f = 100k isl28146, isl28246
5 fn6321.3 june 23, 2008 figure 7. gain vs frequency vs supply vo ltage figure 8. gain vs frequency vs c l figure 9. cmrr vs frequency, v + = 2.4v and 5v figure 10. psrr vs frequency, v + , v - = 1.2v figure 11. psrr vs frequency, v, v + , v - = 2.5v figure 12. input voltage noise density vs frequency typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) r l = 10k a v = +1 v out = 10mv p-p c l = 16.3pf v + = 5v v + = 2.4v -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 cl = 51.7pf cl = 43.7pf cl = 37.7pf cl = 26.7pf cl = 16.7pf cl = 4.7pf 10k 100k 1m 10m 100m frequency (hz) v + = 5v r l = 1k a v = +1 v out = 10mv p-p normalized gain (db) -100 -80 -60 -40 -20 0 20 cmrr (db) v + = 2.4v, 5v r l = 1k a v = +1 v cm = 1v p-p c l = 16.3pf 100 1k 10k 100k 1m 10m frequency (hz) 10 -120 -100 -80 -60 -40 -20 0 20 psrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 psrr- psrr+ v + , v - = 1.2v r l = 1k a v = +1 v source = 1v p-p c l = 16.3pf psrr- psrr+ v + , v - = 2.5v r l = 1k a v = +1 v source = 1v p-p c l = 16.3pf -120 -100 -80 -60 -40 -20 0 20 psrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 10 100 1 10 100 1k 10k 100k frequency (hz) input voltage noise (nv/ hz) v + = 5v r l = 1k a v = +1 c l = 16.3pf isl28146, isl28246
6 fn6321.3 june 23, 2008 figure 13. input current noise density vs frequency figure 14. input voltage noise 0.1hz to 10hz figure 15. large signal step response figure 16. small signal step response figure 17. enable to output response figure 18. input offset voltage vs common-mode input voltage typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) 0.1 1 10 1 10 100 1k 10k 100k frequency (hz) input current noise (pa/ hz) v + = 5v r l = 1k a v = +1 c l = 16.3pf -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 012345678910 time (s) input noise (v) v + = 5v r l = 10k r g = 10, r f = 100k a v = 10000 c l = 16.3pf -1.5 -1.0 -0.5 0 0.5 1.0 1.5 012345678910 time (s) large signal (v) v + , v - = 2.5v r l = 1k r g = r f = 10k av = 2 c l = 16.3pf v out = 1.5v p-p 0.012 0.014 0.016 0.018 0.020 0.022 0.024 0.026 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 time (s) small signal (v) v + , v - = 2.5v r l = 1k r g = r f = 10k a v = 2 c l = 16.3pf v out = 10mv p-p -1 0 1 2 3 4 5 6 0 102030405060708090100 time (s) v-enable (v) -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 output (v) v + = 5v r g = r f = r l = 1k a v = +2 v out = 1v p-p c l = 16.3pf v-enable v-out -100 -80 -60 -40 -20 0 20 40 60 80 100 -10123456 v cm (v) v os (v) v + = 5v r l = open a v = +1000 r f = 100k, r g = 100 isl28146, isl28246
7 fn6321.3 june 23, 2008 figure 19. input offset current vs common-mode input voltage figure 20. supply current enabled vs temperature, v + , v - = 2.5v figure 21. supply current disabled vs temperature, v + , v - = 2.5v figure 22. v os (sot pkg) vs temperature, v + , v - = 2.5v figure 23. v os (sot pkg) vs temperature, v + , v - = 1.2v typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) -100 -80 -60 -40 -20 0 20 40 60 80 100 -10123456 v cm (v) i-bias (na) v + = 5v r l = open a v = +1000 r f = 100k, r g = 100 600 700 800 900 1000 1100 1200 -40-20 0 20406080100120 temperature (c) current (a) min median max n = 1150 4 5 6 7 8 9 10 11 -40 -20 0 20 40 60 80 100 120 temperature (c) current (a) min median max n = 1150 -850 -650 -450 -250 -50 150 350 550 750 -40 -20 0 20 40 60 80 100 120 temperature (c) v os (v) min median max n = 1150 -650 -450 -250 -50 150 350 550 750 -40 -20 0 20 40 60 80 100 120 temperature (c) min max n = 1150 v os (v) median isl28146, isl28246
8 fn6321.3 june 23, 2008 figure 24. i bias+ vs temperature, v + , v - = 2.5v figure 25. i bias- vs temperature, v + , v - = 2.5v figure 26. i bias+ vs temperature, v + , v - = 1.2v figure 27. i bias- vs temperature, v + , v - = 1.2v figure 28. i os vs temperature v + , v - = 2.5v figure 29. i os vs temperature v + , v - = 1.2v typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) -10 -5 0 5 10 15 20 25 30 -40 -20 0 20 40 60 80 100 120 temperature (c) i bias+ (na) min median max n = 1150 -10 -5 0 5 10 15 20 25 30 -40 -20 0 20 40 60 80 100 120 temperature (c) i bias- (na) min median max n = 1150 -25 -20 -15 -10 -5 0 5 10 15 -40 -20 0 20 40 60 80 100 120 temperature (c) ibias+ (na) min median max n = 1150 -25 -20 -15 -10 -5 0 5 10 15 20 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 ibias- (na) -8 -6 -4 -2 0 2 4 6 8 10 -40 -20 0 20 40 60 80 100 120 temperature (c) i os (na) min median max n = 1150 -8 -6 -4 -2 0 2 4 6 8 10 12 -40 -20 0 20 40 60 80 100 120 temperature (c) i os (na) min median max n = 1150 isl28146, isl28246
9 fn6321.3 june 23, 2008 figure 30. cmrr vs temperature v cm = + 2.5v to -2.5v, v + , v - = 2.5v figure 31. psrr vs temperature v + , v - = 1.2v to 2.75v figure 32. avol vs temperature v + , v - = 2.5v, v o = + 2v, r l = 100k figure 33. avol vs temperature v + , v - = 2.5v, v o = + 2v, r l = 1k figure 34. v out high vs temperature v + , v - = 2.5v, r l = 1k figure 35. v out low vs temperature v + , v - = 2.5v, r l = 1k typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) 90 95 100 105 110 115 120 125 130 135 140 -40 -20 0 20 40 60 80 100 120 temperature (c) cmrr (db) min median max n = 1150 90 95 100 105 110 115 120 -40-20 0 20406080100120 temperature (c) psrr (db) min median max n = 1150 0 500 1000 1500 2000 2500 3000 3500 4000 4500 -40 -20 0 20 40 60 80 100 120 temperature (c) a vol (v/mv) min max n = 1150 median 60 80 100 120 140 160 180 200 -40 -20 0 20 40 60 80 100 120 temperature (c) a vol (v/mv) min median max n = 1150 4.930 4.935 4.940 4.945 4.950 4.955 4.960 -40-20 0 20406080100120 temperature (c) v out (v) min median max n = 1150 45 50 55 60 65 70 75 -40 -20 0 20 40 60 80 100 120 temperature (c) min max n = 1150 v out (mv) median isl28146, isl28246
10 fn6321.3 june 23, 2008 pin descriptions isl28146 (6 ld sot-23) isl28246 (8 ld soic) (8 ld msop) pin name function equivalent circuit 4 2 (a) 6 (b) in- in-_a in-_b inverting input circuit 1 3 3 (a) 5 (b) in+ in+_a in-+_b non-inverting input see circuit 1 2 4 v- negative supply circuit 2 1 1 (a) 7 (b) out out_a out_b output circuit 3 6 8 v+ positive supply see circuit 2 5en chip enable circuit 3 in+ in- v+ v- v+ v- capacitively coupled esd clamp v+ v- out logic pin v+ v- isl28146, isl28246
11 fn6321.3 june 23, 2008 applications information introduction the isl28146 and isl28246 are single and dual channel rail-to-rail input, output (r rio) micropower precision operational amplifiers. the parts are designed to operate from single supply (2.4v to 5.0v) or dual supply (1.2v to 2.75v). the parts have an input common mode range that extends 0.25v above the posit ive rail and down to the negative supply rail. the outpu t operation can swing within about 3mv of the supply rails with a 100k load. rail-to-rail input many rail-to-rail input stages us e two differential input pairs, a long-tail pnp (or pfet) and an npn (or nfet). severe penalties have to be paid for this circuit topology. as the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. the isl28146 and isl28246 achieve input rail-to-rail operation without sacrific ing important precision specifications and degrading di stortion performance. the devices? input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. the input bias current versus the common-mode voltage range gives an undistorted behavior from typically down to the negative rail and up to 0.25v higher than the v+ rail. rail-to-rail output a pair of complementary mos devices are used to achieve the rail-to-rail output swing. the nmos sinks current to swing the output in the negative direction. the pmos sources current to swing the out put in the positive direction. the isl28146 and isl28246 with a 100k load will swing to within 3mv of the positive supply rail and within 3mv of the negative supply rail. results of over-driving the output caution should be used when over-driving the output for long periods of time. over-driving the output can occur in two ways: 1. the input voltage times the gai n of the amplif ier exceeds the supply voltage by a large value. 2. the output current required is higher than the output stage can deliver. these conditions can re sult in a shift in the input offset voltage (v os ) as much as 1v/hr. of exposure under these conditions. in+ and in- input protection all input terminals have internal esd protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. they also contain back-to-back diodes across the input terminals (?pin descriptions? on page 10 - circuit 1 ) . for applications where the input differential voltage is expected to exceed 0.5v, an external series resistor must be used to ensure the input currents never exceed 5ma (figure 36). enable/disable feature the isl28146 offers an en pin that disables the device when pulled up to at least 2.0v. in the disabled state (output in a high impedance state), the part consumes typically 10a at room temperature. the en pin has an internal pull-down. if left open, the en pin will pull to the negative rail and the device will be enabled by default. when not used, the en pin should either be left floating or connected directly to the -v pin. by disabling the part, multiple isl28146 parts can be connected together as a mux. in this configuration, the outputs are tied together in parallel and a channel can be selected by the en pin. the loading effects of the feedback resistors of the disabled amp lifier must be considered when multiple amplifier outputs are connected together. note that feed through from the in+ to in- pins occurs on any mux amp disabled channel where the input differential voltage exceeds 0.5v (e.g., active channel v out = 1v, while disabled channel v in = gnd), so the mux implementation is best suited for small signal applic ations. if large signals are required, use series in+ resistors, or a large value r f , to keep the feed through current low enough to minimize the impact on the active channel . see ?limitations of the differential input protection? on page 11. limitations of the differential input protection if the input differential voltage is expected to exceed 0.5v, an external current limiting resistor must be used to ensure the input current never exceeds 5ma. for non-inverting unity gain applications, the current limiting can be via a series in+ resistor, or via a feedback resistor of appropriate value. for other gain configurations, the series in+ resi stor is the best choice, unless the feedback (r f ) and gain setting (r g ) resistors are both sufficiently large to limit the input current to 5ma. large differential input voltages can arise from several sources: 1. during open loop (comparator) operation. used this way, the in+ and in- voltages don?t track, so differentials arise. 2. when the amplifier is disabled but an input signal is still present. an r l or r g to gnd keeps the in- at gnd, while the varying in+ signal creates a differential voltage. mux amp applications are similar, except that the active channel v out determines the voltage on the in- terminal. 3. when the slew rate of the input pulse is considerably faster than the op amp?s slew rate. if the v out can?t keep figure 36. input current limiting - + r in r l v in v out isl28146, isl28246
12 fn6321.3 june 23, 2008 up with the in+ signal, a differential voltage results, and visible distortion occurs on the input and output signals. to avoid this issue, keep the input slew rate below 1.9v/s, or use appropriate current limiting resistors. large (>2v) differential input voltages can also cause an increase in disabled i cc . using only one channel the isl28246 is a dual op amp. if the application only requires one channel, the user must configure the unused channel to prevent it from o scillating. the unused channel will oscillate if the input and output pins are floating. this will result in higher than expected supply currents and possible noise injection into the channel being used. the proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (figure 37). current limiting these devices have no internal current-limiting circuitry. if the output is shorted, it is possible to exceed the absolute maximum rating for output current or power dissipation, potentially resulting in the destruction of the device. power dissipation it is possible to exceed the +125c maximum junction temperatures under certain load and power-supply conditions. it is therefore important to calculate the maximum junction temperature (t jmax ) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. these parameters are related using equation 1: where: ?p dmaxtotal is the sum of the maximum power dissipation of each amplifier in the package (pd max ) ?pd max for each amplifier can be calculated using equation 2: where: ?t max = maximum ambient temperature ? ja = thermal resistance of the package ?pd max = maximum power dissipation of 1 amplifier ?v s = supply voltage (magnitude of v + and v - ) ?i max = maximum supply current of 1 amplifier ?v outmax = maximum output voltage swing of the application r l = load resistance ecg/eeg amplifier application circuit ecg and eeg amplifiers must extract millivolt low frequency ac signals from the skin of the patient while rejecting ac common mode interference and static dc potentials created at the electrode-to-skin interface. in figure 38, the el8171 instrumentation amplifier (u1) and the isl28146 (u2) form a differential input, high impedance high pass patient lead amplifier. u2, rf1 and cf1 form a low pass active feedback amplifier. inserting this amplifier in the feedback loop results in a high pass frequency response in the forward direction. the corner frequency is given by equation 3: voltage dividers r 1 through r 2 and r 3 through r 4 set the overall amplifier pass-band gain. unwanted dc offsets appearing at the patient leads are cancelled by u2 at u1a?s inverting input. resistor divider pair, r 3 through r 4 define the maximum input dc level that is cancelled, and is given by equation 4: in the passband range, u1b?s gain is +1 and the total signal gain is defined by the divider ratios according to equation 5: the gain bandwidth product of the differential amplifier u1 determines the frequency response limit. reference amplifiers u3a and u3b form a dc feedback loop that supplies a reference voltage drive to the patient to establish a common mode dc reference for the differential amplifiers. the voltage at the v cm sense electrode is maintained at the reference voltage set by rf1-rf2. with the values shown in figure 38, the performance parameters are: 1. supply voltage range = +2.4v to +5.5v 2. total supply current draw @ +5v = 1.3ma (typ) 3. common-mode reference voltage (v cm ) = v+/2 4. max dc input offset voltage = v cm 0.18v to 0.41v 5. passband gain = 425v/v 6. lower -3db frequency = 0.05hz figure 37. preventing oscillations in unused channels - + t jmax t max ja xpd maxtotal () + = (eq. 1) pd max 2*v s i smax v s ( - v outmax ) v outmax r l ---------------------------- + = (eq. 2) fhpf 3db ? ? 1/[2* *rf1*cf1 = (eq. 3) v in dc v[r 4 + r 3 r 4 + () ? ] = (eq. 4) v out u1 gain v out v in ? r 1 r 2 + () r 2 ? [] ? r 3 r 4 + () r 4 ? [] == (eq. 5) isl28146, isl28246
13 fn6321.3 june 23, 2008 v+ r 500k r 5k v cm sense + fb- r1 10k 158 + - cf1 4.7f r3 12.4k r4 2.21k v+ v+ c3 0.082f r 1k u1 el8171 u2 isl28146 vout+ vout- vin+ v cm reference to other channels v+ protection circuit c 0.01f supply common +2.4 to 5.5v supply v+ 0.47f 4.7f u3a 1/2 isl28288 v+ v+ u3b 1/2 isl28288 ca 1nf cb 1nf - + v+ v cm rfb 10k rfa 10k r 10k r 10k r 10k rf1 680k figure 38. ecg/eeg amplifier r2 - patient lead connector vin- v+ r 10k fb+ + v cm drive vdc offset signal vdc offset signal signal patient electrode pads vdc offset signal vdc offset signal signal isl28146, isl28246
14 fn6321.3 june 23, 2008 isl28146, isl28246 sot-23 package family e1 n a d e 4 3 2 1 e1 0.15 d c 2x 0.20 c 2x e b 0.20 m d c a-b b nx 6 2 3 5 seating plane 0.10 c nx 1 3 c d 0.15 a-b c 2x a2 a1 h c (l1) l 0.25 0 +3 -0 gauge plane a mdp0038 sot-23 package family symbol millimeters tolerance sot23-5 sot23-6 a 1.45 1.45 max a1 0.10 0.10 0.05 a2 1.14 1.14 0.15 b 0.40 0.40 0.05 c 0.14 0.14 0.06 d 2.90 2.90 basic e 2.80 2.80 basic e1 1.60 1.60 basic e 0.95 0.95 basic e1 1.90 1.90 basic l 0.45 0.45 0.10 l1 0.60 0.60 reference n 5 6 reference rev. f 2/07 notes: 1. plastic or metal protrusions of 0.25mm maximum per side are not included. 2. plastic interlead protrusions of 0.25mm maximum per side are not included. 3. this dimension is measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994. 5. index area - pin #1 i.d. will be located within the indicated zone (sot23-6 only). 6. sot23-5 version has no center lead (shown as a dashed line).
15 fn6321.3 june 23, 2008 isl28146, isl28246 small outline package family (so) gauge plane a2 a1 l l1 detail x 4 4 seating plane e h b c 0.010 b m ca 0.004 c 0.010 b m ca b d (n/2) 1 e1 e n n (n/2)+1 a pin #1 i.d. mark h x 45 a see detail ?x? c 0.010 mdp0027 small outline package family (so) symbol inches tolerance notes so-8 so-14 so16 (0.150?) so16 (0.300?) (sol-16) so20 (sol-20) so24 (sol-24) so28 (sol-28) a 0.068 0.068 0.068 0.104 0.104 0.104 0.104 max - a1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - a2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - d 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 e 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - e1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 basic - l 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - l1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 reference - n 8 14 16 16 20 24 28 reference - rev. m 2/07 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m - 1994
16 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6321.3 june 23, 2008 isl28146, isl28246 mini so package family (msop) 1 (n/2) (n/2)+1 n plane seating n leads 0.10 c pin #1 i.d. e1 e b detail x 3 3 gauge plane see detail "x" c a 0.25 a2 a1 l 0.25 c a b d a m b e c 0.08 c a b m h l1 mdp0043 mini so package family symbol millimeters tolerance notes msop8 msop10 a1.101.10 max. - a1 0.10 0.10 0.05 - a2 0.86 0.86 0.09 - b 0.33 0.23 +0.07/-0.08 - c0.180.18 0.05 - d 3.00 3.00 0.10 1, 3 e4.904.90 0.15 - e1 3.00 3.00 0.10 2, 3 e0.650.50 basic - l0.550.55 0.15 - l1 0.95 0.95 basic - n 8 10 reference - rev. d 2/07 notes: 1. plastic or metal protrusions of 0.15mm maximum per side are not included. 2. plastic interlead protrusions of 0.25mm maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994.

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